Sigma-delta
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From: "Adrianna" <ada1970_at_nospam_wp.pl>
Subject: Sigma-delta
Date: Tue, 7 Jan 2003 12:03:33 +0100
Czy ktos moglby wyjasnic zasade dzialania przetwornika A/C typu delta-sigma?
Ewentualnie prosze o wskazanie linku gdzie moglabym o tym poczytac
(najlepiej po polsku). Musze przygotowac referat.
Z gory dziekuje za pomoc!
Adrianna
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From: Marcin E. Hamerla <mehamerla_at_nospam_pro.onet.pl>
Subject: Re: Sigma-delta
Date: Thu, 09 Jan 2003 15:08:01 +0100
Adrianna napisal(a):
Czy ktos moglby wyjasnic zasade dzialania przetwornika A/C typu delta-sigma?
Ewentualnie prosze o wskazanie linku gdzie moglabym o tym poczytac
www.google.com
(najlepiej po polsku). Musze przygotowac referat.
--
Pozdrowienia, Marcin E. Hamerla
"Nienawidze turystow."
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From: Kubsztal <kubsztal-wytnij-to_at_nospam_alpha.net.pl>
Subject: Re: Sigma-delta
Date: Fri, 10 Jan 2003 16:15:00 +0100
Dnia Tue, 7 Jan 2003 12:03:33 +0100 człowiek znany jako "Adrianna"
<ada1970_at_nospam_wp.pl> wykaligrafował, co następuje:
Czy ktos moglby wyjasnic zasade dzialania przetwornika A/C typu delta-sigma?
Ewentualnie prosze o wskazanie linku gdzie moglabym o tym poczytac
(najlepiej po polsku). Musze przygotowac referat.
Z gory dziekuje za pomoc!
Rudy van de Plassche "Scalone przetworniki AC i CA". Strona 412.
Pozdr. Kubsztal.
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From: "Mardyp" <mardyp_at_nospam_wp.pl>
Subject: Re: Sigma-delta
Date: Sat, 11 Jan 2003 13:08:35 +0100
A czy moglby mi ktos opowiedziec o co chodzi w nastepujacym tekscie:
"The AD9260 utilizes a new analog-to-digital converter architecture
to combine sigma-delta techniques with a high-speed,
pipelined A/D converter. This topology allows the AD9260 to
offer the high dynamic range associated with sigma-delta converters
while maintaining very wide input signal bandwidth
(1.25 MHz) at a very modest 8× oversampling ratio. Figure 53
provides a block diagram of the AD9260. The differential
analog input is fed into a second order, multibit sigma-delta
modulator. This modulator features a 5-bit flash quantizer and
5-bit feedback. In addition, a 12-bit pipelined A/D quantizes
the input to the 5-bit flash to greater accuracy. A special digital
modulation loop combines the output of the 12-bit pipelined
A/D with the delayed output of the 5-bit flash to produce the
equivalent response of a second order loop with a 12-bit
quantizer and 12-bit feedback. The combination of a second
order loop and multibit feedback provides inherent stability:
the AD9260 is not prone to idle tones or full-scale idiosyncracies
sometimes associated with higher order single bit sigmadelta
modulators.
The output of this 12-bit modulator is fed into the digital decimation
filter. The voltage level on the MODE pin establishes
the configuration for the digital filter. The user may bring the
data out undecimated (at the clock rate), or at a decimation
factor of 2×, 4×, or a full 8×. The spectra for these four cases
are shown in Figures 5, 6, 7 and 8, all for a 100 kHz full-scale
input and 20 MHz clock. The spectra of the undecimated
output clearly shows the second order shaping characteristic of
the quantization noise as it rises at frequencies above 1.25 MHz."
Ada
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